Added external clock source to config

This commit is contained in:
madrigal 2025-09-16 10:10:22 -04:00
parent 57a94c596a
commit 4283735722

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@ -21,7 +21,7 @@ cu_cp:
cell_cfg:
dl_arfcn: 628334 # 629668 # 651668 # 500400 # 628334 # ARFCN of the downlink carrier (center frequency).
dl_arfcn: 627000 # 3405 # 629668 # 651668 # 500400 # 628334 # 3425 # ARFCN of the downlink carrier (center frequency).
band: 78 # The NR band.
channel_bandwidth_MHz: 10 # Bandwith in MHz. Number of PRBs will be automatically derived.
common_scs: 30 # Subcarrier spacing in kHz used for data.
@ -113,6 +113,8 @@ ru_sdr:
tx_gain: 70
rx_gain: 50
lo_offset: 0
sync: external
clock: external
expert_cfg:
low_phy_dl_throttling: 0 # Optional FLOAT (0). Throttles the lower PHY DL baseband generation. Setting to 0 disables throttling. Supported: any value in the range [0 - 1].
tx_mode: discontinuous # Optional TEXT (continuous). Selects a radio transmission mode. Discontinuous modes are not supported by all radios. Supported: [continuous, discontinuous, same-port]